This invention relates to semiconductor memory devices and more particularly to an MOS ROM which is electrically programmable.
Semiconductor memory devices which are nonvolatile have great utility in that the information stored is not lost when the power supply is removed. The most common example of a nonvolatile memory is the MOS ROM wherein the stored information is permanently fixed upon manufacture by the gate level mask or moat mask as set forth in U.S. Pat. No. 3,541,543, assigned to Texas Instruments. Most calculators and microprocessor systems employ ROM's of this type to store a program consisting of a large number of instruction words. However, it would be perferable to be able to program the ROM devices after manufacture, so that all devices would be made the same with no unique masks required. Various electrically programmable ROM devices have been developed such as that shown in U.S. Pat. No. 3,984,822 which employs a floating gate in a double level polysilicon MOS ROM; the floating gate is charged by injection of electrons from the channel, and stays charged for years. Other devices of this type have employed charge storage on a nitride-oxide interface. Electrically alterable ROM's have been developed as set forth in U.S. Pat. Nos. 3,881,180, issued Apr. 29, 1975, 3,882,469, issued May 6, 1975, and 4,037,242, all by W. M. Gosney and assigned to Texas Instruments; the Gosney devices are floating gate cells with dual injection (both holes and electrons) so that the gates may be charged or discharged. Other electrically programmable and electrically alterable ROM's are disclosed in U.S. Pat. Nos. 4,112,509, 4,122,544 and 4,092,735 by Lawrence S. Wall or David J. McElroy and assigned to Texas Instruments. However, the prior cells have exhibited some undesirable characteristics such as large cell size, process incompatible with standard techniques, high voltages needed for programming, etc.
It is therefore the principal object of the invention to provide an improved method of making semiconductor devices such as arrays of memory cells, e.g. electrically programmable read-only-memory cells. Another object is to provide a memory cell which is of small cell size when formed in a semiconductor integrated circuit. A further object is to provide a process for making dense arrays of memory cells generally compatible with N-channel silicon gate technology.